74LS114 IC Dual JK Flip-Flop with Preset and Clear DIP-14 74LS114

Product Overview

The 74LS114A is a dual J-K negative-edge-triggered flip-flop. Unlike dual flip-flops with independent clocking, this device features a common clock and common clear input, while maintaining individual J, K, and SET inputs for each flip-flop. It is designed to enable inputs when the clock is HIGH and capture the data on the negative-going transition of the clock pulse.

Core Specifications

• Manufacturer: Motorola (and other secondary sources)

• Function: Dual J-K negative-edge-triggered flip-flop.