74LS107 IC Dual JK Flip-Flop with Clear DIP-14 74LS107

Product Overview

The 74LS107A is a dual J-K flip-flop device containing two independent flip-flops, each featuring individual J, K, clock, and asynchronous direct clear inputs. This device operates using negative-edge triggering, meaning the outputs change state on the high-to-low transition of the clock signal. The asynchronous clear input, when pulled LOW, overrides all other inputs to immediately force the Q output LOW.

Core Specifications

• Manufacturer: Texas Instruments

• Package Type: Available in various packages, including Plastic Small-Outline (SOIC), Ceramic Chip Carriers, and standard Plastic/Ceramic DIPs.

• Function: Dual (2-bit) negative-edge-triggered J-K flip-flops with clear.